criscv/Makefile

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Makefile
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# Compiler to use
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CC ?= gcc
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# Add debugging output
$(info CC is set to $(CC))
# Separate CFLAGS and LDFLAGS
CFLAGS = -Wall -Wextra -std=gnu23 -I include
LDFLAGS = -lelf
# Add potential additional library path (update this path if needed)
LIBRARY_PATH := /usr/lib/x86_64-linux-gnu
LDFLAGS += -L$(LIBRARY_PATH)
# Add debugging output
$(info CFLAGS is set to $(CFLAGS))
$(info LDFLAGS is set to $(LDFLAGS))
# Directory for build outputs
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BUILD_DIR := build
# Name of the output program
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PROGRAM_NAME ?= criscv
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# Find all .c files in the source directory
SRCS := $(wildcard src/*.c)
# Generate corresponding .o file names in the build/obj directory
OBJS := $(patsubst src/%.c,$(BUILD_DIR)/obj/%.o,$(SRCS))
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# Name of the final executable
TARGET := $(BUILD_DIR)/$(PROGRAM_NAME)
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# Default target: build the executable
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all: CFLAGS += -O3
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all: $(TARGET)
# Debug target
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debug: CFLAGS += -O0 -g
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debug: $(TARGET)
# Declare 'all' and 'clean' as phony targets (not files)
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.PHONY: all debug clean
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# Rule to link object files into the final executable
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$(TARGET): $(OBJS) | $(BUILD_DIR)
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@echo "Linking $(TARGET)"
@echo "Command: $(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)"
$(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)
@echo "Linking complete"
du -b $(TARGET) # Size of the executable in bytes
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# Rule to compile source files into object files
$(BUILD_DIR)/obj/%.o: src/%.c | $(BUILD_DIR)/obj
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@echo "Compiling $<"
@echo "Command: $(CC) $(CFLAGS) -c $< -o $@"
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$(CC) $(CFLAGS) -c $< -o $@
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@echo "Compilation complete"
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# Create build directories if they don't exist
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$(BUILD_DIR) $(BUILD_DIR)/obj:
mkdir -p $@
# Clean target: remove the build directory
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clean:
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rm -rf $(BUILD_DIR)
# Add a new target to print library information
.PHONY: libinfo
libinfo:
@echo "Searching for libelf..."
@find /usr -name "libelf.so*" 2>/dev/null || echo "libelf not found in /usr"
@echo "Library search path:"
@echo $(LD_LIBRARY_PATH)
@echo "Compiler search path:"
$(CC) -print-search-dirs