18 lines
287 B
Makefile
18 lines
287 B
Makefile
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CC = gcc
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CFLAGS = -Wall -g
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SOURCE = main.c
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TARGET = measurer
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# Default target
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all: $(TARGET)
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# Rule to build the executable
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$(TARGET): $(SOURCE)
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$(CC) $(CFLAGS) -o $@ $<
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# Rule to clean up object files and the executable
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clean:
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rm -f $(TARGET) *.o
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# Phony targets
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.PHONY: all clean
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