project1/Makefile
2024-11-09 14:45:04 +01:00

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Makefile

# Compiler to use
CC ?= gcc
CFLAGS = -Wall -Wextra -std=gnu17 -I include $(shell pkg-config --cflags lilv-0)
LDFLAGS = -llilv-0 -lsndfile
# Directory for build outputs
BUILD_DIR := build
# Name of the output program
PROGRAM_NAME ?= easyexport
# Find all .c files in the source directory
SRCS := $(wildcard src/*.c)
# Generate corresponding .o file names in the build/obj directory
OBJS := $(patsubst src/%.c,$(BUILD_DIR)/obj/%.o,$(SRCS))
# Name of the final executable
TARGET := $(BUILD_DIR)/$(PROGRAM_NAME)
# Default target: build the executable
all: CFLAGS += -O3
all: $(TARGET)
# Debug target
debug: CFLAGS += -O0 -g
debug: $(TARGET)
# Declare 'all' and 'clean' as phony targets (not files)
.PHONY: all debug clean
# Rule to link object files into the final executable
$(TARGET): $(OBJS) | $(BUILD_DIR)
$(CC) $(CFLAGS) $^ -o $@ $(LDFLAGS)
du -b $(TARGET) # Size of the executable in bytes
# Rule to compile source files into object files
$(BUILD_DIR)/obj/%.o: src/%.c | $(BUILD_DIR)/obj
$(CC) $(CFLAGS) -c $< -o $@
# Create build directories if they don't exist
$(BUILD_DIR) $(BUILD_DIR)/obj:
mkdir -p $@
# Clean target: remove the build directory
clean:
rm -rf $(BUILD_DIR)